Digital signal processing is used in a wide variety of applications. Many of these applications are real-time in the sense that time constraints exist on the processing of the data in order for it to be meaningful or useful to an end user. An example of this is digital broadcast streams, such as digital television and digital radio. The digital signal processing system needs to be capable of processing and decoding the real-time streams rapidly enough to enable the data to be output as quickly as it is received (barring buffering).
Digital signal processing systems often utilise one or more dedicated hardware peripherals in addition to more general purpose digital signal processors. The hardware peripherals are processing blocks that are designed to perform a specific signal processing task in a rapid and efficient manner. For example, interleaving and deinterleaving is an operation that is commonly performed for real-time data using a hardware peripheral. Interleaving and deinterleaving are memory-intensive operations, and the hardware peripherals that perform this utilise an associated dedicated memory device for re-ordering the data.
However, the requirements of different types of real-time data can vary significantly. For example, the various different digital television and radio standards used around the world often have the real-time data structured differently, e.g. using different types or parameters for coding, interleaving, equalisation etc. If the digital signal processing system is to be flexible enough to be used with different standards, then the dedicated memory device used for interleaving/deinterleaving must be sufficiently large to handle the standard with the largest memory demands. As a result, the memory used with an interleaving/deinterleaving hardware peripheral is frequently underutilised.
The embodiments described below are not limited to implementations which solve any or all of the disadvantages of known digital signal processing systems.